Using Hardent’s IP blocks can significantly reduce development time and cost for semiconductor and HDMI controller manufacturers migrating from HDMI 2.0 and earlier to the new 2.1 specification.
January 03, 2018
Hardent, a leading provider of video compression IP cores and a member of the HDMI Forum, today announced plans to support HDMI controller manufacturers with adopting the new HDMI 2.1 specification. Hardent’s portfolio of VESA Display Stream Compression (DSC) and Reed-Solomon Forward Error Correction (FEC) IP cores will accelerate product development time and enable companies to take advantage of key new features of HDMI 2.1 to develop next-generation displays.
Version 2.1 of the HDMI specification, released November 28, 2017 by the HDMI Forum, offers a number of significant new features and bandwidth capabilities to support higher resolution displays and faster refresh rates. HDMI 2.1 provides up to 48 Gbit/s raw bandwidth, which can be used for displays supporting 8K and 10K operating at limited refresh rates or with reduced color information. In order to achieve even higher resolutions and refresh rates, HDMI 2.1 incorporates support for VESA Display Stream Compression (DSC) 1.2a, a visually lossless compression algorithm with a compression ratio of up to 3:1. With the higher link rates allowed in HDMI 2.1, DSC makes resolutions of over 8K with HDR 10-bit color possible, at refresh rates of both 60Hz and 120Hz.
In contrast to other bandwidth reduction methods, such as 4:4:4 to 4:2:2 or 4:2:0 color subsampling, VESA DSC compression preserves the color integrity of the…